Resource-constrained low-power bus encoding with crosstalk delay elimination

In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper, we address the problem of design space exploration of lowenergy software bus encoding in embedded SoC design. Traditionally, finding a bus encoding that leads to a minimum energy consumption of bus has been an important research issue, but relatively little attention has been paid to the cost of software encoding implementation. In embedded system design, the memory space for storing the encoding information is strictly limited. Consequently, exploring the bus encoding implementation alternatives under such constraint becomes very necessary and/or useful. In this paper, we propose a systematic design space exploration algorithm for low-power bus encoding which completely eliminates the crosstalk delay. From experiments on a set of benchmark designs, the proposed algorithm was shown to consume 48% less power consumption on average over existing techniques with relatively little memory overhead.