Title :
Design of CMOS differential LNA at 2.4GHz
Author :
Muhamad, Maizan ; Soin, Norhayati ; Ramiah, H. ; Noh, Norlaili Mohd ; Chong, W.K.
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
Abstract :
This paper present design and simulation of differential low noise amplifier that utilized inductively degenerated common-source (CS) open drain cascode topology. The operating frequency for the design was at 2.4GHz for IEEE 802.11b standard. The LNA has been implemented in RF 0.13um CMOS process. Power constraint noise optimization method has been used to obtain the optimized width of the transistor with a low noise figure and good power gain. Post layout simulation provides a forward gain (S21) of 18.56dB, S11 of -27.63dB with a noise figure (NF) of 1.85dB and IIP3 = -7.75. The total current consumed by the circuit is 7.59mA thus making the power consumption is 9mW.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; differential amplifiers; integrated circuit design; low noise amplifiers; CMOS differential LNA design; CS; IEEE 802.11b standard; RF CMOS process; current 7.59 mA; differential low noise amplifier; frequency 2.4 GHz; gain 18.56 dB; inductively degenerated common-source open drain cascode topology; low noise figure; noise figure 1.85 dB; post layout simulation; power 9 mW; power constraint noise optimization method; power gain; size 0.13 mum; Noise measurement; Radio frequency; CMOS LNA; PCNO; PCSNIM; RF integrated circuit; differential LNA; inductively degenerated;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location :
Hong Kong
DOI :
10.1109/EDSSC.2013.6628125
