Title :
A compact SPICE model for bipolar resistive switching memory
Author :
Kai-Hsiang Hsu ; Wei-Wen Ding ; Meng-Hsueh Chiang
Author_Institution :
Dept. of Electron. Eng., Nat. Ilan Univ., Ilan, Taiwan
Abstract :
In this paper, we successfully develop a compact model for bipolar resistive switching memory using Verilog-A. Fundamental I-V characteristics of RRAM are physically and yet simply represented by this model. Since the Verilog-A modeling is flexible and portable for many circuit simulators, the proposed modeling technique can be widely used.
Keywords :
SPICE; circuit simulation; hardware description languages; random-access storage; switching circuits; I-V characteristics; RRAM; Verilog-A modeling; bipolar resistive switching memory; circuit simulation; compact SPICE model; resistive-switching random access memory; Circuit simulation; Electrodes; Hardware design languages; Integrated circuit modeling; Resistance; Switches; Tunneling; Bipolar switching; RRAM; Verilog-A;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location :
Hong Kong
DOI :
10.1109/EDSSC.2013.6628127
