Research on testing of a microsystem based on SiP

Author

Xiongbo Zhao ; Penglong Jiang ; Liangliang Liu

Author_Institution

Nat. Key Lab. of Sci. & Technol. on Aerosp. Intell. Control, Beijing, China

fYear

2013

fDate

11-14 Aug. 2013

Firstpage

37

Lastpage

40

Abstract

System in Package (SiP) technology satisfies the further increasing demand by integration of different functions into one unit to reduce size and improve functionality. But the disadvantages of SiP are also increased risks in reliability, manufacturability, and difficulty with test access. A complete final test is necessary before its application. This paper presents a functional test scheme for a mircosystem based on 3D-SiP. Test system consists of a test board designed specifically and Cygwin environment of PC in debug support unit (DSU) and JTAG TAP techniques. It allows the complete final system-testing carry out in a fast, flexible, and nondestructive way. And it can improve the testability and reliability of microsystem.

Keywords

integrated circuit testing; system-in-package; three-dimensional integrated circuits; 3D-SiP; Cygwin environment; JTAG TAP techniques; debug support unit; functional test scheme; microsystem; system in package technology; system-testing carry out; test access; test board; test system; Hardware; Protocols; Radiation detectors; Random access memory; Reliability; System-on-chip; Testing; DSU; JTAG; SIP; final test;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology (ICEPT), 2013 14th International Conference on

Conference_Location

Dalian

Type

conf

DOI

10.1109/ICEPT.2013.6756416

Filename

6756416