DocumentCode
347655
Title
Testing a system-on-a-chip with embedded microprocessor
Author
Rajsuman, Rochit
Author_Institution
Advantest America R&D Center, Santa Clara, CA, USA
fYear
1999
fDate
1999
Firstpage
499
Lastpage
508
Abstract
In this paper, we describe the test methodology for embedded cores based system-on-a-chip (SoC) which contains a microprocessor core. First the microprocessor core is tested for correctness of all the instructions and then the computation power of the microprocessor core is used to test the on-chip memories and other cores, A small Iddq test set is also used to detect physical defects. The design features to facilitate Iddq testing are described
Keywords
automatic testing; built-in self test; computer equipment testing; electric current measurement; embedded systems; integrated circuit testing; integrated memory circuits; logic testing; microprocessor chips; Iddq test; computation power; design features; embedded microprocessor; microprocessor core; on-chip memories; physical defects; system-on-a-chip; Built-in self-test; Computer aided instruction; Counting circuits; Decoding; Logic design; Logic testing; Microprocessors; Registers; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805773
Filename
805773
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