Self-checking scheme for very fast clocks´ skew correction

Author

Metra, C. ; Giovanelli, Flavio ; Soma, Mani ; Riccó, Bruno

Author_Institution

Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy

fYear

1999

fDate

1999

Firstpage

652

Lastpage

661

Abstract

This paper presents a digital scheme to correct undesired skews between couples of clocks of synchronous systems. Correction is automatically and very fastly performed during system run-time. The proposed scheme is self-checking with respect to a wide set of possible internal (permanent as well as temporary) faults, and is easily scalable to account for different skew tolerance/sensitivity requirements. It is suitable to be implemented in VLSI, very deep submicron technology, as well as using field programmable gate arrays

Keywords

Monte Carlo methods; VLSI; automatic testing; built-in self test; clocks; delay lines; fault diagnosis; field programmable gate arrays; integrated circuit testing; Monte Carlo simulation; VLSI; clocks; field programmable gate arrays; permanent faults; run-time; self-checking scheme; skew correction; skew tolerance/sensitivity; synchronous systems; temporary faults; very deep submicron technology; Clocks; Control systems; Delay; Fault detection; Field programmable gate arrays; Frequency synchronization; Runtime; Switches; Testing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1999. Proceedings. International

Conference_Location

Atlantic City, NJ

ISSN

1089-3539

Print_ISBN

0-7803-5753-1

Type

conf

DOI

10.1109/TEST.1999.805793

Filename

805793