DocumentCode :
347664
Title :
Tradeoff analysis for producing high quality tests for custom circuits in PowerPCTM microprocessors
Author :
Wang, Li.-C. ; Abadir, Magdy S.
Author_Institution :
Somerset PowerPC Design Center, Motorola Inc., Austin, TX, USA
fYear :
1999
fDate :
1999
Firstpage :
830
Lastpage :
838
Abstract :
Custom circuits, in contrast to those synthesized by automatic tools, are manually designed blocks of which performance is critical to the full chip operation. Testing these block represents a major challenge and hence, a crucial time-to-market factor in micro-processor design flow. This paper investigates various methodologies for testing custom blocks. Issues of efficiently obtaining proper circuit model for ATPG tools as well as producing quality tests are analyzed and discussed. Tradeoffs among various methods are analyzed and compared. Experience and results based on recent PowerPC microprocessors will be reported
Keywords :
automatic test pattern generation; circuit CAD; design for testability; integrated circuit design; integrated circuit testing; logic testing; microprocessor chips; production testing; ATPG tools; PowerPCTM microprocessors; custom circuits; high quality tests; micro-processor design flow; quality test; time-to-market factor; Automatic test pattern generation; Circuit faults; Circuit synthesis; Circuit testing; Design methodology; Electrical fault detection; Fault detection; Microprocessors; Process design; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1999. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-5753-1
Type :
conf
DOI :
10.1109/TEST.1999.805814
Filename :
805814
Link To Document :
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