Title :
MAPro: A Tiny Processor for Reconfigurable Baseband Modulation Mapping
Author :
Liang Tang ; Ambrose, Jude Angelo ; Parameswaran, Sri
Author_Institution :
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW, Australia
Abstract :
The need to integrate multiple wireless communication protocols into a single low-cost flexible hardware platform is prompted by the increasing number of emerging communication protocols and applications in modern embedded systems. The modulation mapping scheme, one of the key components in the communication baseband, varies differing communication protocols. This paper presents an efficient tiny processor, named MAPro, which is programmable at runtime for differing modulation schemes. MAPro costs little in area, consumes less power compared to other programmable solutions, and is sufficiently fast to satisfy even the most demanding of Software Defined Radio (SDR) applications. The proposed method is flexible (when compared to ASICs) and suitable for mobile applications (when compared to FPGAs and ASIP processors). The area of MAPro is only 25% of the combined ASIC implementation of multiple individual modulation mapping circuits, while the throughput meets specification. Power consumption is 110% more than the ASIC implementation on average. MAPro outperforms both FPGA and ASIP processor significantly in area and power consumption. In terms of throughput, MAPro is similar to FPGA, and outperforms the ASIP processor.
Keywords :
field programmable gate arrays; microprocessor chips; modulation; ASIP processors; FPGA; MAPro; embedded system; emerging communication protocols; hardware platform; mobile application; modulation mapping circuit; modulation mapping scheme; multiple wireless communication protocols; power consumption; reconfigurable baseband modulation mapping; software defined radio application; tiny processor; Application specific integrated circuits; Field programmable gate arrays; Phase shift keying; Protocols; Table lookup; Throughput; modulation; multi-mode; processor; reconfigurable;
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
Print_ISBN :
978-1-4673-4639-9
DOI :
10.1109/VLSID.2013.153