A Study on Instruction-set Selection Using Multi-application Based Application Specific Instruction-set Processors

Efficiency in embedded systems is paramount to achieve high performance while consuming less area and power. Processors in embedded systems have to be designed carefully to achieve such design constraints. Application Specific Instruction set Processors (ASIPs) exploit the nature of applications to design an optimal instruction set. Despite being not general to execute any application, ASIPs are highly preferred in the embedded systems industry where the devices are produced to satisfy a certain type of application domain/s (either intra-domain or inter-domain). Typically, ASIPs are designed from a base-processor and functionalities are added for applications. This paper studies the multi-application ASIPs and their instruction sets, extensively analyzing the instructions for inter-domain and intra-domain designs. Metrics analyzed are the reusable instructions and the extra cost to add a certain application, together with the hardware synthesis numbers, such as area, timing and delay. A wide range of applications from various application benchmarks (BioPerf, CommBench, MediaBench, MiBench and SPEC2006) and domains are analyzed for three different architectures (LEON2, PISA and ARM-Thumb). Processors are generated for these architectures for different configurations to analyze and synthesize. Our study shows that the intra-domain applications contain larger number of common instructions, whereas the inter-domain applications have very less common instructions, regardless the kind of architecture (and therefore the ISA).