• DocumentCode
    3477309
  • Title

    Hardware/software co-configuration for multiprocessor SoPC (work-in-progress report)

  • Author

    Takada, Hiroaki ; Honda, Shinya ; Nishiyama, Reiji ; Yuyama, Hiroshi

  • Author_Institution
    Dept. of Inf. & Comput. Sci., Toyohashi Univ. of Technol., Japan
  • fYear
    2003
  • fDate
    15-16 May 2003
  • Firstpage
    7
  • Lastpage
    8
  • Abstract
    Real-time operating systems (RTOS) for multiprocessor systems built on a single FPGA should be configurable to a wide rage of architecture. Because the configuration of RTOS depends on hardware architecture, it is advantageous to co-configure multiprocessor architecture and RTOS simultaneously. The paper is a work-in-progress report of our research on configurable RTOS and co-configuration technology.
  • Keywords
    configuration management; hardware-software codesign; multiprocessing systems; real-time systems; system-on-chip; FPGA; co-configuration technology; configurable RTOS; hardware architecture; hardware/software co-configuration; multiprocessor SoPC; multiprocessor architecture; multiprocessor system; real-time operating systems; Application software; Computer architecture; Embedded system; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Memory management; Multiprocessing systems; Operating systems; Real time systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Software Technologies for Future Embedded Systems, 2003. IEEE Workshop on
  • Print_ISBN
    0-7695-1937-7
  • Type

    conf

  • DOI
    10.1109/WSTFES.2003.1201350
  • Filename
    1201350
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3477309