• DocumentCode
    3477814
  • Title

    Implementation of multiple-valued functions using literal-splitting technique

  • Author

    Dubrova, Elena

  • Author_Institution
    R. Inst. of Technol., Stockholm, Sweden
  • fYear
    2003
  • fDate
    16-19 May 2003
  • Firstpage
    7
  • Lastpage
    10
  • Abstract
    One of the main practical problems of implementing multiple-valued logic circuits is reduced noise margins. In this paper we show that this problem can be avoided by implementing multiple-valued functions using the following technique. First, the input domain of an m-valued n-variable function f is partitioned into m m-valued input binary-valued output characteristic functions. Then, each of these functions is treated as a function of n·m binary variables, representing the literals of the variables off. The fact that any multiple-valued function can be implemented that way is known. The main contribution of this paper is to show a technology, for which this type of implementation is natural and results in no hardware overhead.
  • Keywords
    Boolean functions; multivalued logic; multivalued logic circuits; nanotechnology; binary variables; characteristic functions; hardware overhead; literal-splitting technique; multiple-valued functions; multiple-valued logic circuits; reduced noise margins; Assembly; CMOS logic circuits; CMOS technology; Chemical technology; Logic circuits; Logic devices; Nanotechnology; Noise reduction; Semiconductor device noise; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2003. Proceedings. 33rd International Symposium on
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-1918-0
  • Type

    conf

  • DOI
    10.1109/ISMVL.2003.1201377
  • Filename
    1201377