• DocumentCode
    3477871
  • Title

    Enhancements and implementation of RC6TM block cipher for data security

  • Author

    Ragab, Abdul Hamid M ; Ismail, Nabil A. ; Allah, Osama S Farag

  • Author_Institution
    Dept. of Comput. Sci. & Eng, Fac. of Electron. Eng., Menouf, Egypt
  • Volume
    1
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    133
  • Abstract
    This paper presents an enhanced fast block cipher, which is a symmetric encryption algorithm designed to meet the requirements of the Advanced Encryption Standard (AES). It is an enhanced extension of the RC6 block cipher with the potential of increasing security and improving performance. The proposed block cipher makes essential heavy use of data-dependent rotations. Its salient features include the use of eight working registers instead of four, and the inclusion of integer multiplication as an additional primitive operation. The use of multiplication with eight working registers greatly increases the diffusion achieved per round, allowing for greater security, fewer rounds, and increased throughput. It is also capable of handling 256-bit plaintext and ciphertext block sizes and is suitable for simple implementation using hardware or software. These enhancements are expected to satisfy market demands and system security developers using available advanced processors. A complete specification and implementation for the enhanced block cipher are given. Several test vectors are used for inspecting the validity of the encryption and decryption algorithm. Comparative performance evaluation of the proposed block cipher, RC6, RC5, and DES are addressed. Simulation results show that the enhanced block cipher achieves maximum throughput and minimum encryption time
  • Keywords
    block codes; cryptography; digital arithmetic; Advanced Encryption Standard; DES cipher; RC5 cipher; RC6 block cipher; data security; data-dependent rotations; decryption algorithm; diffusion; integer multiplication; symmetric encryption algorithm; system security developers; working registers; Algorithm design and analysis; Communication system security; Computational modeling; Consumer electronics; Cryptography; Data security; Hardware; Protection; Testing; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON 2001. Proceedings of IEEE Region 10 International Conference on Electrical and Electronic Technology
  • Print_ISBN
    0-7803-7101-1
  • Type

    conf

  • DOI
    10.1109/TENCON.2001.949566
  • Filename
    949566