Title :
Bidirectional data transfer based asynchronous VLSI system using multiple-valued current mode logic
Author :
Hanyu, Takahiro ; Takahashi, Tomohiro ; Kameyama, Michitaka
Author_Institution :
Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
Abstract :
A new asynchronous data transfer scheme using multiple-valued 2-color 1-phase coding, called a bidirectional data transfer scheme, is proposed for a high-performance and low-power VLSI system. Valid data signals of "0" or "1" are represented by binary dual-rail complementary codes, (0,1) and (1,0), and "ODD" and "EVEN" colors are represented by binary dual-rail codes, (0,0) and (1,1), respectively. Control signals from both a transmitter and a receiver are represented by dual-rail multiple-valued coding with superposition of data and color signals. The use of dual-rail coding makes it easy to detect EVEN and ODD information by calculating the sum of dual-rail codes, even when data and color information are mixed on the same wires in asynchronous data transfer Since a linear-summation can be implemented by wiring without active devices in multiple-valued bidirectional current-mode circuitry, the proposed circuit for asynchronous control becomes simple. It is evaluated in a 0.18 μm CMOS technology that the switching speed of the proposed asynchronous data transfer scheme is about 1.6-times faster than that of the corresponding binary CMOS implementation under the normalized power dissipation.
Keywords :
CMOS integrated circuits; VLSI; asynchronous circuits; binary codes; multivalued logic; CMOS technology; EVEN information; ODD information; asynchronous VLSI system; asynchronous data transfer scheme; bidirectional data transfer; binary dual-rail complementary code; multiple-valued 2-color 1-phase coding; multiple-valued bidirectional current-mode circuitry; multiple-valued current mode logic; normalized power dissipation; Asynchronous circuits; CMOS technology; Delay; Integrated circuit interconnections; Logic; Power dissipation; Transmitters; Very large scale integration; Wires; Wiring;
Conference_Titel :
Multiple-Valued Logic, 2003. Proceedings. 33rd International Symposium on
Print_ISBN :
0-7695-1918-0
DOI :
10.1109/ISMVL.2003.1201391