DocumentCode
3478337
Title
Photoresist-enhanced wafer charging during high current ion implantation
Author
Dixon, William ; Lukaszek, Wes ; Heden, Craig
Author_Institution
Dept. of Appl. Phys., Stanford Univ., CA, USA
fYear
1996
fDate
16-21 Jun 1996
Firstpage
85
Lastpage
88
Abstract
Various experiments are described involving the influence of patterned photoresist (PR) on wafer charging during high current arsenic implantation. Use of Stanford 100-mm CHARM-2 test chips allows measurement of both potentials and currents delivered to a wafer during implantation-thus allowing extraction of the J-V characteristic of the beam itself. The results indicate that the placement of the PR is of crucial importance: photoresist on field oxide has a moderate influence on charging, whereas PR on a charge-collection-electrode increases positive charging dramatically. Other PR charging effects discussed include: outgassing, resist thickness, wafer blocked-area (area unable to conduct current to the substrate), wafer surface secondary electron coefficient, and PR surface currents. Also, a model of the ion beam-treated as a plasma-is given to aid in the understanding of PR-enhanced charging
Keywords
integrated circuit testing; integrated circuit yield; ion implantation; photoresists; production testing; surface charging; 100 mm; CHARM-2 test chips; J-V characteristic; charge-collection-electrode; high current ion implantation; outgassing; patterned photoresist; photoresist-enhanced wafer charging; positive charging; resist thickness; wafer blocked-area; wafer surface secondary electron coefficient; Current measurement; Implants; Ion implantation; Probes; Resists; Semiconductor device modeling; Sensor phenomena and characterization; Surface charging; Surface treatment; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Ion Implantation Technology. Proceedings of the 11th International Conference on
Conference_Location
Austin, TX
Print_ISBN
0-7803-3289-X
Type
conf
DOI
10.1109/IIT.1996.586134
Filename
586134
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