Title :
Design and characterization of an embedded ASIC DRAM
Author :
Birk, Gershom ; Elliott, Duncan G. ; Cockburn, Bruce F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
Abstract :
University DRAM research is hindered by the lack of access to specialized commodity DRAM or blended logic-DRAM processes. In this paper we describe the design of an embedded DRAM in the 0.35 /spl mu/m TSMC logic process, available through the Canadian Microelectronics Corporation (CMC). Our test chip design used a variation of the HDRAM(R) macro cells developed by MOSAID Technologies Inc. This paper describes the DRAM and gives some preliminary test results.
Keywords :
DRAM chips; application specific integrated circuits; cellular arrays; embedded systems; integrated circuit design; integrated circuit testing; 0.35 micron; Canadian Microelectronics Corporation; HDRAM macro cells; MOSAID Technologies; TSMC logic process; blended logic-DRAM processes; embedded ASIC DRAM; specialized commodity DRAM; test chip design; Application specific integrated circuits; Capacitors; Chip scale packaging; Circuit testing; Logic design; Microelectronics; Prototypes; Random access memory; System testing; Timing;
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
Print_ISBN :
0-7803-5579-2
DOI :
10.1109/CCECE.1999.807236
