High-performance low-power inner product processor

Author

Natter, William ; Margala, Martin ; Durdle, Nelson G.

Author_Institution

Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada

Volume

1

fYear

1999

fDate

9-12 May 1999

Firstpage

486

Abstract

This paper presents three alternative implementations of a high-performance, low-power inner product processor. Several previously published algorithms are examined, and modifications that reduce the average activity and computational time are proposed. In addition, various hardware implementations and evaluations of their power and performance are provided. The presented inner product forms an integral part of a complex shading architecture in a volume imaging system.

Keywords

computer architecture; computer power supplies; digital arithmetic; image processing equipment; performance evaluation; power consumption; vectors; algorithm modifications; average activity; complex shading architecture; computational time; hardware implementations; high-performance low-power inner product processor; performance evaluation; power evaluation; volume imaging system; Arithmetic; Biomedical imaging; Computed tomography; Computer architecture; Energy consumption; Graphics; Hardware; Magnetic resonance imaging; Power engineering computing; Real time systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 1999 IEEE Canadian Conference on

Conference_Location

Edmonton, Alberta, Canada

ISSN

0840-7789

Print_ISBN

0-7803-5579-2

Type

conf

DOI

10.1109/CCECE.1999.807246

Filename

807246