Title :
An area-efficient 0.25 /spl mu/m memory compiler designed for 780 MHz operations
Author :
Tsang, Tony ; Thukral, Rahul
Author_Institution :
Mentor Graphics Corp., Warren, NJ, USA
Abstract :
Embedded memories are indispensable components in today´s system-on-chips. High-speed memories are highly valued by the ASIC designers. Designing a flexible, yet high speed (780 MHz), SRAM compiler faces many challenges. We have managed to develop such a memory compiler without penalizing area and power. Moreover, we extended our compiler to support the common design views needed in typical ASIC design flow. In this paper, we describe some of the critical issues and techniques in the development of a high-speed memory compiler.
Keywords :
SRAM chips; application specific integrated circuits; embedded systems; high-speed integrated circuits; integrated circuit design; 0.25 micron; 780 MHz; ASIC designers; SRAM compiler; area-efficient memory compiler; common design views; design flow; embedded memories; high-speed memories; system-on-chips; Application specific integrated circuits; Delay effects; Design optimization; Energy consumption; Energy management; Graphics; Memory management; Power system management; Random access memory; System-on-a-chip;
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
Print_ISBN :
0-7803-5579-2
DOI :
10.1109/CCECE.1999.807255
