DocumentCode :
3479064
Title :
Low on-resistance power LDMOSFET using double metal process technology
Author :
Hoshi, Masakatsu ; Mihara, Teruyoshi ; Matsushita, Tsutomu ; Hirota, Yukitsugu
Author_Institution :
Nissan Motor Co. Ltd., Yokosuka, Japan
fYear :
1991
fDate :
22-24 Apr 1991
Firstpage :
61
Lastpage :
64
Abstract :
A low on-resistance lateral power FET which is suitable for the H-bridge motorcontrol IPD (intelligent power device) for automatic applications is described. The LDMOSFET was fabricated using the double metal process technology with a hexagonal pattern layout which increases the cell density. The device with cell density as high as 5.1 million cells/in2 has a specific on-resistance of 1.15 mΩ-cm 2 under pulsed drain bias conditions, and the reverse blocking voltage is 42 V. This on-resistance represents the lowest among the lateral type power FETs with similar blocking voltage
Keywords :
integrated circuit technology; power integrated circuits; power transistors; 42 V; H-bridge; automatic applications; double metal process technology; hexagonal pattern layout; intelligent power device; lateral power FET; low on-resistance; motorcontrol IPD; power LDMOSFET; reverse blocking voltage; Automobiles; Dielectrics; Diffusion processes; Electrodes; FETs; Geometry; Intelligent vehicles; Laboratories; Low voltage; MOSFET circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 1991. ISPSD '91., Proceedings of the 3rd International Symposium on
Conference_Location :
Baltimore, MD
ISSN :
1063-6854
Print_ISBN :
0-7803-0009-2
Type :
conf
DOI :
10.1109/ISPSD.1991.146067
Filename :
146067
Link To Document :
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