DocumentCode :
3479294
Title :
Approximate adder synthesis for area- and energy-efficient FIR filters in CMOS VLSI
Author :
Bandeira Soares, Leonardo ; Bampi, Sergio ; Costa, Eduardo
Author_Institution :
Grad. Program on Microelectron. (PGMicro), Fed. Univ. of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
fYear :
2015
fDate :
7-10 June 2015
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes the synthesis of approximate adders to improve the area and energy efficiency of FIR filters implemented in CMOS. We demonstrate energy per sample savings and hardware area reduction in the filters with our design method. All savings are in addition to the improvements obtained on previously optimized digital filters in which state-of-the-art multiplierless multiple constant multiplication optimizations are included in the design method. Digital finite impulse response filters are largely used in multimedia systems which can tolerate levels of approximations in computing or loss of accuracy in the arithmetic dataflow. Our work deals with different levels of approximation in ripple-carry adders which are part of the filters implemented in hardware, fully synthesized in CMOS, and later compared to the best precise implementation of the same filter. Our results show that the effort to explore area and energy savings in low power optimized circuits through the approximate computing approach is validated with area and energy reductions up to 18.8% and 15.5% respectively, without compromising the filters frequency response or the Signal to Noise Ratio (SNR) of recorded 16-bit audio signals. Our approximate adder method enables a higher degree of area and energy efficiencies in CMOS VLSI filters.
Keywords :
CMOS integrated circuits; FIR filters; VLSI; adders; low-power electronics; CMOS VLSI filters; approximate adder synthesis; area-efficient FIR filters; arithmetic dataflow; audio signals; digital finite impulse response filters; energy per sample savings; energy-efficient FIR filters; hardware area reduction; low power optimized circuits; multiplierless multiple constant multiplication optimizations; optimized digital filters; ripple-carry adders; signal to noise ratio; word length 16 bit; Adders; Approximation methods; CMOS integrated circuits; Energy efficiency; Finite impulse response filters; Signal to noise ratio; VLSI design; approximate computing; digital filters architectures; energy efficiency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2015 IEEE 13th International
Conference_Location :
Grenoble
Type :
conf
DOI :
10.1109/NEWCAS.2015.7182095
Filename :
7182095
Link To Document :
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