• DocumentCode
    3479597
  • Title

    The study on grinding process of flip chip wafers

  • Author

    Xiaobo Zhuang ; Binhao Lian ; Jinchun He ; Xiaocheng Feng

  • Author_Institution
    Beijing MXTronics Corp., Beijing, China
  • fYear
    2013
  • fDate
    11-14 Aug. 2013
  • Firstpage
    698
  • Lastpage
    701
  • Abstract
    IC technology changes with each passing day, developing towards the direction of higher integration, higher density and smaller size. The process of wire bonding can´t meet the requirements. FC(Flip chip) technology becomes more mature day by day. Bump interconnection is an important characteristic of flip chip, usually consisting of PbSn alloy or SnAgCu alloy. In order to ensure the effective interconnection between bumps and substrates, the bumps need keep coplanar. However, certain pressure will act on wafers during the process of grinding and taping. The question of how to protect bumps from deformation and How to reduce the damage layer after grinding will be studied Dicing is the process after grinding. Taping is also used before dicing. The technological process will be introduced.
  • Keywords
    flip-chip devices; grinding; FC technology; IC technology; bump interconnection; damage layer reduction; deformation; dicing process; effective interconnection; flip chip wafers; grinding process; substrates; taping process; technological process; wire bonding; Electronics packaging; Feeds; Flip-chip devices; Metals; Rough surfaces; Surface roughness; Surface treatment; Flip chip; dicing; grinding; taping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Packaging Technology (ICEPT), 2013 14th International Conference on
  • Conference_Location
    Dalian
  • Type

    conf

  • DOI
    10.1109/ICEPT.2013.6756562
  • Filename
    6756562