DocumentCode :
3480044
Title :
An Experimental Cascade Cell Dynamic Memory
Author :
Stark, D. ; Watanabe, H. ; Furuyama, T.
Author_Institution :
Rambus Inc., Mountain View, CA, USA
fYear :
1994
fDate :
9-11 June 1994
Firstpage :
89
Lastpage :
90
Keywords :
Bandwidth; Capacitors; Circuits; Costs; Decoding; Lithography; Random access memory; Shift registers; Virtual manufacturing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1994. Digest of Technical Papers., 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1918-4
Type :
conf
DOI :
10.1109/VLSIC.1994.586230
Filename :
586230
Link To Document :
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