Semi-automation of Configuration Files Generation for Heterogeneous Multi-tile Systems

Heterogeneous Multi-Processor System-on-Chips (HMPSoCs) offer an attractive alternative to homogeneous systems to achieve the increasing requirements of modern media-processing applications. Such systems take advantage of the heterogeneity of their processing units (RISC vs. VLIW) combined with efficient memory architecture and a specific communication infrastructure. However, the complexity of such architectures requires efficient programming tools. They rely on software generation flows that have already been widely studied. Connecting several HMPSoCs to form a heterogeneous system is one solution to target the highly demanding applications belonging to the high performance-computing world. Binary code generation for such many-processor architectures faces new challenges. Indeed, binary generation requires a back-end part composed of processor-specific tools like compilers or linkers, that can no longer be configured by hand when dealing with hundreds of processors. We address in this paper the need to automate the whole configuration process of binary generation flows through the study of two important configuration aspects: the memory mapping and communication configurations. We propose a prototype including a semi-automatic configuration generation module that has been successfully applied on a particularly complex application (LQCD).