DocumentCode
348065
Title
An efficient buffer insertion algorithm for large networks based on Lagrangian relaxation
Author
Liu, I-Min ; Aziz, Adnan ; Wong, D.F. ; Zhou, Hai
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fYear
1999
fDate
1999
Firstpage
210
Lastpage
215
Abstract
We propose a novel buffer insertion algorithm for handling more general networks, whose underlying topology is a directed acyclic graph rather than just a RC tree. The algorithm finds a global buffering which minimizes buffer area while meeting the timing constraints. We use Lagrangian relaxation to translate the timing constraints to a cost in the objective function, and simplify the resulting objective function using the special structure of the problem we are solving. The core of the algorithm is a local refinement procedure, which iteratively computes the optimal buffering for each edge so as to minimize a weighted area and delay objective. The resulting procedure is fast, and takes full advantage of the slack available on noncritical paths
Keywords
buffer circuits; circuit CAD; Lagrangian relaxation; buffer insertion; directed acyclic graph; global buffering; local refinement procedure; Computer networks; Cost function; Delay; Iterative algorithms; Lagrangian functions; Network topology; Runtime; Timing; Tree graphs; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 1999. (ICCD '99) International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-7695-0406-X
Type
conf
DOI
10.1109/ICCD.1999.808427
Filename
808427
Link To Document