DocumentCode
3480763
Title
Laser-Induced Fault Simulation
Author
Feng Lu ; Di Natale, G. ; Flottes, M.-L. ; Rouzeyre, B.
Author_Institution
LIRMM, Univ. Montpellier II, Montpellier, France
fYear
2013
fDate
4-6 Sept. 2013
Firstpage
609
Lastpage
614
Abstract
This paper presents a multi-level simulator for laser-induced fault simulation in digital circuits. It automatically performs the simulation of laser-induced faults using layout information and laser spot information in order to locate affected gates and derive fault-models. The paper mainly focuses on multi-level simulation for obtaining high accuracy of the fault simulation at transistor level and high speed for the simulation of the rest of the circuit. This multi-level process allows handling natural and maliciously induced physical phenomenon leading to circuit misbehavior, while dealing with large circuits.
Keywords
circuit reliability; circuit simulation; laser beam applications; logic circuits; logic gates; circuit misbehavior; digital circuits; fault-models; laser spot information; laser-induced fault simulation; layout information; multilevel simulator; transistor level; Accuracy; Circuit faults; Delays; Integrated circuit modeling; Laser modes; Logic gates; Transistors; Layout-Oriented Fault Simulation; Multi-level Fault Simulation; PLS Effects;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design (DSD), 2013 Euromicro Conference on
Conference_Location
Los Alamitos, CA
Type
conf
DOI
10.1109/DSD.2013.72
Filename
6628333
Link To Document