Title :
PERMS: A Bit Permutation Instruction for Accelerating Software Cryptography
Author :
Kolay, Santanu ; Khurana, S. ; Sadhukhan, Anupam ; Rebeiro, Chester ; Mukhopadhyay, Debdeep
Author_Institution :
Indian Inst. of Technol. Kharagpur, Kharagpur, India
Abstract :
This paper proposes a new bit-permutation instruction, named PERMS for accelerating software cryptography. Bit permutation is a very commonly used operation in standard cryptographic algorithms. However, modern processors are word oriented and provide little support for high-speed implementation of bit permutations. With the help of PERMS instruction, any arbitrary n bit permutation can be performed using less than log(n) number of instructions. The proposed instruction is also scalable to perform 2n bit permutation, using an n bit instruction. The comparison with the existing bit-permutation instructions shows that PERMS needs least area requirement in hardware and also provides better throughput/slice ratio than one of the best bit-permutation instruction found in literature. The instruction format of PERMS provides the scope to be added with all the modern ISAs. Further, due to the very less hardware requirement, PERMS can also be considered for resource constrained devices, like PDAs.
Keywords :
computer architecture; cryptography; instruction sets; ISA; PERMS; PERMS instruction; bit-permutation instruction; high-speed implementation; instruction set architecture; least area requirement; software cryptography; standard cryptographic algorithms; throughput-slice ratio; word oriented processors; Acceleration; Arrays; Cryptography; Hardware; Program processors; Registers; Standards; Bit Permutation; ISA; Instruction Set Extension; PERMS; Software Cryptography;
Conference_Titel :
Digital System Design (DSD), 2013 Euromicro Conference on
Conference_Location :
Los Alamitos, CA
DOI :
10.1109/DSD.2013.109