DocumentCode :
3483321
Title :
A low-power 10 bit ADC in a 0.25 μm CMOS: design considerations and test results
Author :
Rivetti, A. ; Anelli, G. ; Anghinolfi, F. ; Mazza, G. ; Rotondo, F.
Author_Institution :
EP Div., CERN, Geneva, Switzerland
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
42628
Abstract :
This paper presents the design and test of a low power analog to digital converter implemented in a commercial 0.25 μm CMOS technology. The circuit has been developed to serve as a building block in multi-channel data acquisition systems for high energy physics (HEP) applications. Therefore medium resolution (10 bits), very low power consumption and high modularity are the key features of the design. In HEP experiments the resistance of the electronics to the ionizing radiation is often a primary issue. Hence the ADC has been laid-out using a radiation tolerant approach. The test results show that the chip operates as a full 10 bit converter up to a clock frequency of 30 MHz. No degradation in performance has been measured after a total dose of 10 Mrd (SiO2)
Keywords :
CMOS integrated circuits; analogue-digital conversion; data acquisition; integrated circuit design; integrated circuit testing; nuclear electronics; 0.25 μm CMOS; 10 Mrad; 10 bit converter; 30 MHz; SiO2; design considerations; high energy physics; high modularity; ionizing radiation; low power analog-digital converter; low-power 10 bit ADC; multichannel data acquisition systems; nuclear electronics; radiation tolerant approach; test results; very low power consumption; Analog-digital conversion; CMOS technology; Circuit testing; Clocks; Data acquisition; Degradation; Energy consumption; Energy resolution; Frequency conversion; Ionizing radiation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium Conference Record, 2000 IEEE
Conference_Location :
Lyon
ISSN :
1082-3654
Print_ISBN :
0-7803-6503-8
Type :
conf
DOI :
10.1109/NSSMIC.2000.949862
Filename :
949862
Link To Document :
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