Title :
Advanced Poly-Si NMIS and Poly-Si/TiN PMIS Hybrid-Gate High-k CMIS using PVD/CVD-Stacked TiN and Local Strain Technique
Author :
Nishida, Y. ; Kawahara, T. ; Sakashita, S. ; Mizutani, M. ; Yamanari, S. ; Higashi, M. ; Murata, N. ; Inoue, M. ; Yugami, J. ; Endo, S. ; Hayashi, T. ; Yamashita, T. ; Oda, H. ; Inoue, Y.
Author_Institution :
Renesas Technol. Corp., Itami
Abstract :
Performance of advanced hybrid-gate CMOS (poly-Si/HfSiON nMIS and poly-Si/TiN/HfSiON pMIS) is demonstrated. Vth of pMIS is controlled by fluorine implantation and by PVD/CVD-stacked TiN, which has higher WF than conventional single-CVD TiN. This combination enables sufficient Vth-control without degradation of device characteristics by excessive fluorine. Performance boosters such as strain enhancement techniques and laser annealing are easily and successfully introduced, and high current drivability is obtained. This advanced hybrid structure is promising for CMIS platforms of 45-nm node and beyond.
Keywords :
MIS devices; chemical vapour deposition; elemental semiconductors; laser beam annealing; silicon; NMIS; PMIS hybrid-gate high-k CMIS; PVD/CVD; fluorine implantation; laser annealing; local strain technique; Annealing; Atherosclerosis; Capacitive sensors; Degradation; Fabrication; High K dielectric materials; High-K gate dielectrics; Stress; Surface-mount technology; Tin;
Conference_Titel :
VLSI Technology, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-03-1
DOI :
10.1109/VLSIT.2007.4339697
