Author :
Wei, M. ; Banerjee, R. ; Zhang, L. ; Masad, A. ; Reidy, S. ; Ahn, J. ; Chao, H. ; Lim, C. ; Castro, T. ; Karpenko, O. ; Ru, M. ; Fastow, R. ; Brand, A. ; Guo, X. ; Gorman, J. ; McMahon, W.J. ; Woo, B.J. ; Fazio, A.
Abstract :
A highly manufacturable self-aligned contact ETOXtrade NOR flash memory technology scalable beyond the 40 nm node is presented. The technology has been demonstrated on an MLC-capable 256 Mb array at the 65 nm node with the smallest cell area (0.036 mum2) reported to date. Key features include aggressively scaled drain space, symmetric S/D layout for superior lithography and device scaling, novel self-aligned contact integration with excellent spacer reliability, and equivalent CMOS performance to the conventional ETOXtrade process flow.
Keywords :
CMOS integrated circuits; NOR circuits; flash memories; lithography; CMOS performance; ETOX; device scaling; lithography; self-aligned contact NOR flash technology; self-aligned contact integration; Costs; Dielectrics; Dry etching; Flash memory; Implants; Lithography; Plugs; Rails; Space technology; Wet etching; ETOX¿; Flash; NOR; SAC;
