Title :
Impact ionization in saturated high-voltage LDD lateral DMOS FETs
Author :
Cornell, Michael E. ; Williams, Richard K. ; Ilmaz, Hamza Y.
Author_Institution :
Siliconix Inc., Santa Clara, CA, USA
Abstract :
The mechanism of impact ionization in high-voltage lightly-doped drain (LDD) lateral DMOS FETs is analyzed. Two-carrier PISCES simulations confirm a reduction in both sustaining voltage and output impedance compared to zero or one-carrier simulations. Maximum impact ionization is not observed at the peak field location, but as an interaction of subsurface conduction and a high-field region located under the gate field plate. An extended gate field plate is shown to reduce pre-avalanche impact ionization without substantially degrading avalanche breakdown. Breakdown optimizing design methodologies are shown to be inadequate to guarantee minimal impact ionization. Finally, the reduction in saturated output impedance predicted by PISCES is confirmed on 500-V fabricated devices
Keywords :
digital simulation; impact ionisation; insulated gate field effect transistors; semiconductor device models; 500 V; gate field plate; high-field region; impact ionization; lateral DMOS FETs; lightly-doped drain; minimal impact ionization; output impedance; saturated output impedance; subsurface conduction; sustaining voltage; two-carrier PISCES simulations; Design methodology; Design optimization; Electric breakdown; FETs; Impact ionization; Impedance; MOSFETs; Poisson equations; Switches; Voltage;
Conference_Titel :
Power Semiconductor Devices and ICs, 1991. ISPSD '91., Proceedings of the 3rd International Symposium on
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0009-2
DOI :
10.1109/ISPSD.1991.146090
