Title :
Annealing behavior of a doubly MeV implanted silicon
Author :
Cho, Nam-Hoon ; Huh, Tae-Hoon ; Jang, Yoon-Taek ; Ro, Jae-Sang ; Oh, Jae-Geun ; Lee, Kil-Ho ; Cho, Byung-Jin ; Kim, Jong-Choul
Author_Institution :
Dept. of Metall. Eng. & Mater. Sci., Hong Ik Univ., Seoul, South Korea
Abstract :
MeV ion implantation has gained much attention in the field of CMOS retrograde well engineering. Damage formation by high energy implantation has a significant characteristics in that the lattice damage is concentrated near RP and isolated from the surface. Si self interstitials are thought to be responsible for the formation of secondary defects upon annealing. The region of excess interstitials could be generated near RP by two effects combined with Frenkel separation and dopant activation. However, at the same time, the small amount of vacancy rich zone may exist ahead of an interstitial rich zone. In this study we conducted model experiments to reveal the interactions between different types of defects upon annealing in a doubly MeV implanted silicon using ion species of P and C. The morphology of secondary defects induced by P implantation in a doubly implanted sample was observed to be different from that in singly P implanted one. Meanwhile, no extended defects were observed in the C implanted layer. DCXRD rocking curve analyses for the sample annealed at 550°C indicated that a positive strain built up at ~2.3 μm by P implantation was effectively reduced by ~50% using additional carbon implantation. However, the amount of strain relaxation in the C implanted layer does not decrease upon annealing at 1000°C
Keywords :
annealing; carbon; elemental semiconductors; interstitials; ion implantation; phosphorus; silicon; vacancies (crystal); 1000 C; 550 C; CMOS retrograde well engineering; DCXRD rocking curve; Frenkel separation; Si:P,C; annealing; dopant activation; high energy double ion implantation; lattice damage; secondary defects; self interstitials; strain relaxation; vacancies; Annealing; Capacitive sensors; Gettering; Impurities; Ion implantation; Lattices; Leakage current; Semiconductor process modeling; Silicon; Surface morphology;
Conference_Titel :
Ion Implantation Technology. Proceedings of the 11th International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-3289-X
DOI :
10.1109/IIT.1996.586492