DocumentCode :
3485288
Title :
IEEE Standard Boundary Scan 1149.1 An Introduction
Author :
Andrews, John
Author_Institution :
National Semiconductor Corporation
fYear :
1991
fDate :
16-18 April 1991
Firstpage :
522
Lastpage :
527
Abstract :
With increased system packaging density, testability advantages of scan design were applied to IC boundary pins for ensured pin access where direct physical contact was becoming increasingly difficult. As the advantages of boundary-scan were becoming recognized in many commercial applications, it became apparent that a universal definition was needed to achieve the economies of using an industry standard. This led to the 1990 approval of IEEE Standard 1149. 1.
Keywords :
Circuit testing; Clocks; Electronics packaging; Fixtures; Integrated circuit packaging; Integrated circuit testing; Pins; Printed circuits; Surface-mount technology; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electro International, 1991
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ELECTR.1991.718268
Filename :
718268
Link To Document :
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