DocumentCode
3485501
Title
High Speed and Highly Cost effective 72M bit density S3 SRAM Technology with Doubly Stacked Si Layers, Peripheral only CoSix layers and Tungsten Shunt W/L Scheme for Standalone and Embedded Memory
Author
Jung, Soon-Moon ; Lim, Hoon ; Yeo, Chadong ; Kwak, Kunho ; Son, Byoungkeun ; Park, Hanbyung ; Jonghoon Na ; Shim, Jae-Joo ; Hong, Changmin ; Kim, Kinam
Author_Institution
Samsung Electron., Yongin
fYear
2007
fDate
12-14 June 2007
Firstpage
82
Lastpage
83
Abstract
Highly cost effective and high speed 72M bit density S3 SRAM technology was successfully achieved for standalone memory and embedded memory with selective epitaxial growth of Si films, low thermal SSTFT process , periphery only Co salicidation, and W shunt wordline scheme.
Keywords
SRAM chips; embedded systems; CoSi; SRAM technology; W; bit density; embedded memory; peripheral only CoSix layers; salicidation; selective epitaxial growth; shunt wordline scheme; standalone memory; static random access memory; tungsten shunt; CMOS technology; Costs; Lithography; Logic devices; MOS devices; Oxidation; Plasma temperature; Random access memory; Semiconductor films; Tungsten;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2007 IEEE Symposium on
Conference_Location
Kyoto
Print_ISBN
978-4-900784-03-1
Type
conf
DOI
10.1109/VLSIT.2007.4339736
Filename
4339736
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