Author :
Breitwisch, M. ; Nirschl, T. ; Chen, C.F. ; Zhu, Y. ; Lee, M.H. ; Lamorey, M. ; Burr, G.W. ; Joseph, E. ; Schrott, A. ; Philipp, J.B. ; Cheek, R. ; Happ, T.D. ; Chen, S.-H. ; Zaidi, S. ; Flaitz, P. ; Bruley, J. ; Dasaka, R. ; Rajendran, B. ; Rossnagel, S.
Abstract :
We have successfully demonstrated a novel "pore" phase change memory cell, whose critical dimension (CD) is independent of lithography. Instead, the pore diameter is accurately defined by intentionally creating a "keyhole" with conformal deposition. Fully integrated 256 kbit test chips have been fabricated in 180nm CMOS technology. We report SET times of 80 ns, RESET currents less than 250 muA, and accurate sub-lithographic CDs that can be less than 20% the size of the lithographically -defined diameter.
Keywords :
CMOS memory circuits; lithography; random-access storage; CMOS technology; PCRAM; RESET currents; conformal deposition; critical dimension; lithography-independent memory; pore phase change memory; size 180 nm; sub-lithographic CD; CMOS technology; Lithography; Lungs; Nonvolatile memory; Phase change memory; Phase change random access memory; Phased arrays; Temperature; Testing; Threshold voltage; NV memory; PCRAM; chalcogenide; pore;
