DocumentCode :
3485758
Title :
Design and analysis of generalized link extended hierarchical interconnection networks
Author :
Karam, Omar H. ; Agrawal, Dharma P.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear :
1993
fDate :
13-16 Apr 1993
Firstpage :
643
Lastpage :
649
Abstract :
Hierarchical interconnection networks (HINs) have been introduced to maintain a low node degree with an increasing network size. This paper presents a systematic procedure for designing a general class of HINs and could be based on existing topologies by connecting a partition of each disjoint cluster as a gateway to all other clusters in the network. The size of these gateways, or the gatewidth, can be varied to satisfy the required network characteristics. This scheme is illustrated by defining hypercube based HINs, and different designs are obtained by varying the cluster size, the gatewidth, and the number of network levels. Relations are obtained for the different network parameters
Keywords :
multiprocessor interconnection networks; disjoint cluster; gatewidth; generalized link extended hierarchical interconnection networks; hypercube; network parameters; Classification tree analysis; Costs; High definition video; Hypercubes; Joining processes; Multiprocessor interconnection networks; Network topology; Protocols; Telecommunication traffic; Tree graphs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1993., Proceedings of Seventh International
Conference_Location :
Newport, CA
Print_ISBN :
0-8186-3442-1
Type :
conf
DOI :
10.1109/IPPS.1993.262805
Filename :
262805
Link To Document :
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