Fast algorithms for image labeling on a reconfigurable network of processors

This paper presents constant-time algorithms for labeling the connected components of images on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which employs constant-weight codes. The use of such codes enables identifying a single representative processor for each component in a constant number of steps. The proposed algorithms can label an N×N image or an N-vertex graph in O (1) time using Θ(N²) processors, which is optimal. Furthermore, the proposed techniques lead to O(log N/log log N)-time labeling algorithms on a network of N² processors with a reconfigurable bus of width O(log N) bits