DocumentCode :
3486022
Title :
Addressing Key Concerns for Implementation of Ni FUSI into Manufacturing for 45/32 nm CMOS
Author :
Shickova, A. ; Kauerauf, T. ; Rothschild, A. ; Aoulaiche, M. ; Sahhaf, S. ; Kaczer, B. ; Veloso, A. ; Torregiani, C. ; Pantisano, L. ; Lauwers, A. ; Zahid, M. ; Rost, T. ; Tigelaar, H. ; Pas, M. ; Fretwell, J. ; McCormack, J. ; Hoffmann, T. ; Kerner, C. ;
Author_Institution :
KU Leuven, Leuven
fYear :
2007
fDate :
12-14 June 2007
Firstpage :
158
Lastpage :
159
Abstract :
Key remaining concerns raised for implementation of Ni FUSI into manufacturing are addressed and solved suggesting that Ni FUSI is worthy for manufacturing. We studied NiSi, Ni2Si and Ni31Si12 FUSI gates and their showing 1) Excellent reliability (NBTI, PBTI and TDDB) on HfSiON (EOT=1.1nm), with lifetimes >10 years at 1.2 V for optimized HfSiON (BTI similar/improved compared to reference MG, strong effect of N (DPN HfSiON) finding optimal point in NMOS-PMOS BTI trade-off). 2) No Ni penetration into substrate and no additional reliability degradation with multilevel metallization BEOL thermal budget. 3) Excellent mismatch characteristics and low Vt variability down to LG~40nm W-130 nm (no FUSI grain orientation effects), 4) Excellent EOT scalability with no PMOS VFB roll-off down to EOT-0.7 nm (Ni31Si12, WF-4.9 eV); 5) SRAM defectivity analysis finding main type of defects and solutions for their elimination. We also showed 6) phase formation (NiSi, Ni31Si12) similar to blanket films at LG=30 nm.
Keywords :
CMOS integrated circuits; MOSFET; hafnium compounds; nickel compounds; semiconductor device manufacture; semiconductor device metallisation; semiconductor device reliability; silicon compounds; CMOS integration; EOT scalability; FUSI grain orientation effects; HfSiON; NBTI; NMOS-PMOS BTI trade-off; Ni2Si; Ni31Si12; NiSi; PBTI; full nickel silicidation; multilevel metallization BEOL; negative bias temperature instability; nickel FUSI device; optimized HfSiON; positive bias temperature instability; size 32 nm; size 45 nm; voltage 1.2 V; Channel bank filters; Etching; MOS devices; Manufacturing; Niobium compounds; Scalability; Silicidation; Silicides; Stress; Titanium compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-03-1
Type :
conf
DOI :
10.1109/VLSIT.2007.4339765
Filename :
4339765
Link To Document :
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