Title :
Analog computational circuits for neural network implementations
Author :
Al-Nsour, Mahmoud ; Abdel-Aty-Zohdy, Hoda S.
Author_Institution :
Dept. of Electr. & Syst. Eng., Oakland Univ., Rochester, MI, USA
Abstract :
High performance NMOS analog circuits which perform voltage addition, average weighing, and signal scaling are presented. Utilization of these circuits in artificial neural network applications is briefly discussed. The circuits are characterized by a simple structure which offers compactness, low voltage supply, and wide input range. In addition, inputs and outputs are voltages which eliminate the need for current voltage conversion. Hence, reduced power consumption and higher performance is achieved. A two-input analog adder has been accomplished through MOSIS 2.0 μm n-well CMOS technology at Orbit Semiconductors, and occupies an area of 135×145 μm2. Inputs are within ±3 V for 3.3 V supply. Power consumption is less than 0.5 mW and THD is less than -36 dB. Measurements and performance evaluation are presented
Keywords :
CMOS analogue integrated circuits; adders; analogue processing circuits; harmonic distortion; neural chips; 2.0 micron; 3.3 V; NMOS analog circuits; Orbit Semiconductors; THD; analog computational circuits; artificial neural network applications; average weighing; current voltage conversion; input range; n-well CMOS technology; neural network implementations; performance evaluation; power consumption; signal scaling; two-input analog adder; voltage addition; Adders; Analog circuits; Analog computers; Artificial neural networks; CMOS technology; Computer networks; Energy consumption; Low voltage; MOS devices; Neural networks;
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
DOI :
10.1109/ICECS.1999.812282
