• DocumentCode
    348605
  • Title

    A new 5-parameter MOS transistors mismatch model

  • Author

    Serrano-Gotarredona, T. ; Linares-Barranco, Bernabé

  • Author_Institution
    Nat. Microelectron. Center, Sevilla, Spain
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    315
  • Abstract
    A new 5-parameter MOS transistor mismatch model is introduced capable of predicting transistor mismatch with very high accuracy for ohmic and saturation strong inversion regions, including short channel transistors. The new model is based on splitting the contribution of the mobility degradation parameter mismatch into two components, and modulating them as the transistor transitions from ohmic to saturation regions. The model is tested for a wide range of transistor sizes (30), and shows excellent precision, never reported before for such a wide range of transistor sizes, including short channel transistors
  • Keywords
    MOSFET; carrier mobility; semiconductor device models; MOS transistor mismatch model; five-parameter MOSFET mismatch model; mobility degradation parameter mismatch; ohmic region; saturation strong inversion region; short channel transistors; Degradation; Intrusion detection; Length measurement; MOSFETs; Microelectronics; Predictive models; Semiconductor device measurement; Size measurement; Testing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
  • Conference_Location
    Pafos
  • Print_ISBN
    0-7803-5682-9
  • Type

    conf

  • DOI
    10.1109/ICECS.1999.812286
  • Filename
    812286