A High Efficiency DDC Algorithm for Narrow Band Signal

Author

Wang Yunshan ; Zhang Tao ; Zhang Jun

Author_Institution

Sch. of Electron. & Inf. Eng., Beihang Univ., Beijing, China

fYear

2010

fDate

7-9 Nov. 2010

Firstpage

1

Lastpage

5

Abstract

With the improvement of the performance of ADC, it is available to sample and process real signal in intermediate frequency in radio communication system design. The large source usage and long latency of image-reject filter and decimation in IF DDC are the difficult problems in design. But In many occasions the signal can be processed as narrow band signal. In this paper, we designed an M-points average decimate algorithm to solve these problems in occasion of narrow band signal DDC. The algorithm is implemented in FPGA and its source usage is compared with a common FIR filter design. In the end, an excellent image-reject performance of the algorithm shows the validity of the design.

Keywords

analogue-digital conversion; antialiasing; band-stop filters; direct digital control; field programmable gate arrays; radiocommunication; signal sampling; ADC performance; FIR filter design; FPGA; M-point average decimate algorithm; anti-aliasing effect; high efficiency DDC algorithm; image reject filter; intermediate frequency; narrow band signal; radio communication system; source usage; Algorithm design and analysis; Attenuation; Field programmable gate arrays; Filtering algorithms; Filtering theory; Finite impulse response filter; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

E-Product E-Service and E-Entertainment (ICEEE), 2010 International Conference on

Conference_Location

Henan

Print_ISBN

978-1-4244-7159-1

Type

conf

DOI

10.1109/ICEEE.2010.5661336

Filename

5661336