• DocumentCode
    3486121
  • Title

    Low voltage/Sub-ns Operation Bulk Thyristor-SRAM (BT-RAM) Cell with Double Selective Epitaxy Emitters (DEE)

  • Author

    Sugizaki, T. ; Nakamura, M. ; Yanagita, M. ; Shinohara, M. ; Ikuta, T. ; Ohchi, T. ; Kugimiya, K. ; Kanda, S. ; Yagami, K. ; Oda, T.

  • Author_Institution
    Sony Corp., Kanagawa
  • fYear
    2007
  • fDate
    12-14 June 2007
  • Firstpage
    170
  • Lastpage
    171
  • Abstract
    We have successfully developed an alternative SRAM cell for the first time using a Bulk Thyristor-RAM (BT-RAM) with a Double selective Epitaxy technique for two Emitter regions (DEE). The DEE BT-RAM can read/write at Ins at a low-voltage of 0.6 V or read/write at 1.5 V at a high speed of 100 ps. It also has good retention characteristics even at 125degC, suggesting good scalability for gate length of 65 nm and beyond, and its ideal cell size is expected to be 30 F2, one-fourth that of a conventional 6T-SRAM cell. The DEE BT-RAM is therefore a promising alternative SRAM for the 65-nm generation and beyond.
  • Keywords
    SRAM chips; low-power electronics; thyristor circuits; bulk thyristor SRAM cell; double selective epitaxy emitters; low voltage; size 65 nm; sub ns operation; time 100 ps; voltage 0.6 V; voltage 1.5 V; Anodes; Cathodes; Channel bank filters; Epitaxial growth; Low voltage; Random access memory; Scalability; Sea measurements; Substrates; Thyristors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2007 IEEE Symposium on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-900784-03-1
  • Type

    conf

  • DOI
    10.1109/VLSIT.2007.4339770
  • Filename
    4339770