DocumentCode
348621
Title
Computing hexagonal Steiner trees using PCx [for VLSI]
Author
Thurber, Andrew P. ; Xue, Guoliang
Author_Institution
Dept. of Comput. Sci., Vermont Univ., Burlington, VT, USA
Volume
1
fYear
1999
fDate
1999
Firstpage
381
Abstract
Presents a branch and bound algorithm for computing a hexagonal Steiner minimum tree, where the fixed-topology problems are solved using PCx. Although currently it can only compute optimal solutions for small-sized instances, this algorithm makes it possible for researchers to compare heuristic solutions against optimal solutions for small-sized instances. Our min-min and max-min heuristics have also been shown to be good heuristic algorithms for computing hexagonal Steiner minimum trees, but not as good as the iterated I-Steiner heuristic. We have previously designed a linear time algorithm for computing an optimal layout of a minimum spanning tree, which can be viewed as a fast approximation to hexagonal Steiner minimum trees
Keywords
VLSI; circuit layout CAD; circuit optimisation; integrated circuit layout; tree searching; trees (mathematics); PCx; VLSI; branch and bound algorithm; fixed-topology problems; heuristic solutions; hexagonal Steiner trees; max-min heuristics; min-min heuristics; minimum tree; optimal layout; optimal solutions; Computer science; Cost function; Heuristic algorithms; Joining processes; Law; Legal factors; Network topology; Steiner trees; Very large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location
Pafos
Print_ISBN
0-7803-5682-9
Type
conf
DOI
10.1109/ICECS.1999.812302
Filename
812302
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