A basic design guide for CMOS folding and interpolating A/D converters-overview and case study

Author

Lin, K.-L. ; Van Den Boom, T. ; Stevanovic, N. ; Driesen, Johan ; Hammerschmidt, D. ; Hosticka, B.

Author_Institution

Fraunhofer Inst. of Microelectron. Circuits & Syst., Duisburg, Germany

Volume

1

fYear

1999

fDate

1999

Firstpage

529

Abstract

The design techniques for analog-to-digital converters (ADCs) require careful optimization in order to minimize the amount of hardware required and enable economical monolithic integration. A basic architectural design guide dedicated to folding and interpolating ADCs is outlined and described. A case study for a 10-bit ADC is treated under consideration of different folding and interpolating factors. The trade-off between chip area, power dissipation, and ADC performance is characterized according to the diverse design variables

Keywords

CMOS integrated circuits; analogue-digital conversion; integrated circuit design; interpolation; A/D converters; ADC performance; CMOS folding ADCs; CMOS interpolating ADCs; analog-to-digital converters; architectural design guide; chip area; design techniques; monolithic integration; optimization; power dissipation; Circuits and systems; Computer aided software engineering; Cost function; Design optimization; Hardware; Manufacturing; Microelectronics; Power dissipation; Power generation economics; Power system economics;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on

Conference_Location

Pafos

Print_ISBN

0-7803-5682-9

Type

conf

DOI

10.1109/ICECS.1999.812339

Filename

812339