Title :
Practical, fast Monte Carlo statistical static timing analysis: Why and how
Author :
Singhee, Amith ; Singhal, Sonia ; Rutenbar, Rob A.
Author_Institution :
T.J. Watson Res. Center, IBM, Yorktown Heights, NY
Abstract :
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the approximations made in all SSTA tools, but Monte Carlo itself is never employed as a strategy for practical SSTA. It is widely believed to be ldquotoo slowrdquo - despite an uncomfortable lack of rigorous studies to support this belief. We offer the first large-scale study to refute this belief. We synthesize recent results from fast quasi-Monte Carlo (QMC) deterministic sampling and efficient Karhunen-Loeve expansion (KLE) models of spatial correlation to show that Monte Carlo SSTA need not be slow. Indeed, we show for the ISCAS89 circuits, a few hundred, well-chosen sample points can achieve errors within 5%, with no assumptions on gate models, wire models, or the core STA engine, with runtimes less than 90 s.
Keywords :
Karhunen-Loeve transforms; Monte Carlo methods; program diagnostics; sampling methods; timing circuits; ISCAS89 circuits; Karhunen-Loeve expansion models; core STA engine; fast quasiMonte Carlo deterministic sampling; gate models; spatial correlation; statistical static timing analysis; wire models; Circuit analysis computing; Delay estimation; Error correction; Flexible printed circuits; Monte Carlo methods; Sampling methods; Semiconductor device modeling; Semiconductor process modeling; Size control; Timing;
Conference_Titel :
Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2819-9
Electronic_ISBN :
1092-3152
DOI :
10.1109/ICCAD.2008.4681573