DocumentCode :
3486640
Title :
SPT-a new smart power technology with a fully self aligned DMOS cell
Author :
Preussger, A. ; Glenz, E. ; Heift, K. ; Malek, K. ; Schwetlick, W. ; Wiesinger, K. ; Werner, W.M.
Author_Institution :
Siemens AG, Munich, Germany
fYear :
1991
fDate :
22-24 Apr 1991
Firstpage :
195
Lastpage :
197
Abstract :
Describes a novel smart power technology (SPT) which integrates n-channel (DMOS) power transistors for multichannel applications, p-channel high voltage transistors, and CMOS logic and bipolar devices. The DMOS was optimized with respect to minimal Ron (on-resistance) and breakdown voltage greater than 75 V. With a self-aligned DMOS contact cell a specific Ron of 0.28 Ω-mm2 without metal contribution was reached
Keywords :
bipolar transistors; insulated gate field effect transistors; logic devices; power integrated circuits; power transistors; CMOS logic; bipolar devices; breakdown voltage; fully self aligned DMOS cell; multichannel applications; p-channel high voltage transistors; smart power technology; CMOS logic circuits; CMOS technology; Isolation technology; Logic devices; Metallization; Silicon; Size measurement; Switches; Telecommunication switching; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 1991. ISPSD '91., Proceedings of the 3rd International Symposium on
Conference_Location :
Baltimore, MD
ISSN :
1063-6854
Print_ISBN :
0-7803-0009-2
Type :
conf
DOI :
10.1109/ISPSD.1991.146097
Filename :
146097
Link To Document :
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