Title :
An advanced 0.25-μm BiCMOS process integration technology for multi-GHz communication LSIs
Author :
Kinoshita, Y. ; Suzuki, H. ; Nakamura, S. ; Fukaishi, M. ; Tajima, A. ; Sucmura, Y. ; Itani, T. ; Miyamoto, H. ; Fuji, H. ; Yotsuyanagi, M. ; Henmi, N. ; Yamazaki, T.
Author_Institution :
ULSI Device Dev. Labs., Kanagawa, Japan
Abstract :
This paper presents an advanced BiCMOS process integration technology, which employs 0.25-μm Ti salicide p+/n+ dual gate CMOSFETs, double poly-Si self-aligned bipolar transistors and passive elements such as double poly-Si capacitors and poly-Si resistors, while reducing the number of process steps. We also have demonstrated a one-chip transceiver LSI circuit for an optical data link using the ANSI fiber-channel standard of 4.25 Gb/s. The voltage controlled oscillator (VCO) of the clock recovery circuit oscillates from 3.2 GHz to 6.8 GHz according to the control voltage
Keywords :
BiCMOS integrated circuits; large scale integration; mixed analogue-digital integrated circuits; mobile communication; optical communication equipment; optical fibre communication; optical links; transceivers; 0.25 micron; 3.2 to 6.8 GHz; 4.25 Gbit/s; ANSI fiber-channel standard; BiCMOS process integration technology; Si; TiSi2; clock recovery circuit; control voltage; double polysilicon capacitors; mixed analogue-digital ICs; multi-GHz communication LSIs; one-chip transceiver; optical data link; p+/n+ dual gate CMOSFETs; passive elements; polysilicon resistors; polysilicon self-aligned bipolar transistors; voltage controlled oscillator; ANSI standards; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; CMOSFETs; Capacitors; Large scale integration; Resistors; Transceivers; Voltage-controlled oscillators;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1997. Proceedings of the
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-3916-9
DOI :
10.1109/BIPOL.1997.647359
