Highly sensitive CMOS passive wake-up circuit

We implement a passive wake-up circuit with high voltage sensitivity using standard CMOS technology. We propose voltage multipliers and inverter chain optimized for high voltage sensitivity. The wake-up circuit converts small RF input signals into a DC signal to trigger the interrupt. Using an RF input signal, whose center frequency is 870 MHz and input power is -29.3 dBm, we achieved an output voltage of 0.7 V, enough to trigger on the output. The fully integrated CMOS IC is fabricated using a 0.18 mum standard CMOS process. The chip area is as small as 230 times 190 mum².