A 9-GHz dual-modulus 0.18-µm CMOS prescaler using HLO-FF technique

This paper describes the design issues of the dual modulus divide-by-4/5 prescaler with merged AND gates and HLO-FF topologies fabricated in 0.18 mum CMOS technologies. By the two topologies, the propagation delay and the voltage swing can be reduced to improve the maximum operating frequency. Because the CLK transistors operate at higher frequency, how to choose the CLK transistor size and the bias current properly plays an important role. With 2.5 V supply voltage, the divide-by-4/5 prescaler can operate up to 9 GHz.