DocumentCode :
3487872
Title :
A 1-V 900-MHz CMOS cascaded even-harmonic mixer
Author :
Luo, Tang-Nian ; Yen-Chia Chen ; Yu, Yueh-Hua ; Chen, Yen-Chia
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
fYear :
2008
fDate :
16-20 Dec. 2008
Firstpage :
1
Lastpage :
4
Abstract :
To achieve high level of integration and reduce bill of material (BOM), direct down- conversion architecture has become popular for RF receivers. In spite of many associated benefits, direct conversion receivers (DCR) suffer from signal-to-noise ratio (SNR) degradation because of DC offset. This paper proposed the cascaded even-harmonic mixer architecture to reduce the supply voltage requirement. Operated at 1 V, the 0.18-mum CMOS even-harmonic mixer consumes only 1.4 mW and achieves 3-dB conversion gain. The measured LO-to-IF and LO-to-RF isolations are 44 dB and 58 dB, respectively.
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; UHF mixers; radio receivers; CMOS cascaded even harmonic mixer; RF receivers; frequency 900 MHz; power 1.4 mW; size 0.18 mum; voltage 1 V; Bills of materials; CMOS technology; Circuits; Degradation; Energy consumption; Mixers; Noise figure; Radio frequency; Semiconductor device measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location :
Macau
Print_ISBN :
978-1-4244-2641-6
Electronic_ISBN :
978-1-4244-2642-3
Type :
conf
DOI :
10.1109/APMC.2008.4958359
Filename :
4958359
Link To Document :
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