Title :
MUTE-AES: A multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm
Author :
Ambrose, Jude Angelo ; Parameswaran, Sri ; Ignjatovic, Aleksandar
Author_Institution :
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW
Abstract :
Side channel attack based upon the analysis of power traces is an effective way of obtaining the encryption key from secure processors. Power traces can be used to detect bitflips which betray the secure key. Balancing the bitflips with opposite bitflips have been proposed, by the use of opposite logic. This is an expensive solution, where the balancing processor continues to balance even when encryption is not carried out in the processor.
Keywords :
cryptography; embedded systems; multiprocessing systems; bitllips; cryptographic program; differential power analysis; dual processor architecture; embedded systems; encryption key; multiprocessor algorithmic balancing technique; side channel attack; Algorithm design and analysis; Cryptography; Embedded system; Hamming weight; Information analysis; Information security; Mobile handsets; Performance analysis; Personal digital assistants; Power system security;
Conference_Titel :
Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2819-9
Electronic_ISBN :
1092-3152
DOI :
10.1109/ICCAD.2008.4681650
