Thermal-aware reliability analysis for Platform FPGAs

Increasing levels of integration in field programmable gate arrays, have resulted in high on-chip power densities, and temperatures. The heterogeneity of components and scaled feature sizes in platform FPGAs have made them vulnerable to various temperature dependent failure mechanisms. Hence, we need to introduce temperature awareness in tackling such failures that affect the lifetime reliability of FPGAs. In this paper, we present a dynamic thermal-aware reliability management (DTRM) framework to analyze the impact of temperature variations on the longterm/lifetime reliability of Platform FPGAs. We first study the temperature variations, both across and with-in designs, due to the use of various hard-blocks within a 65 nm platform FPGA. In the presence of such variations, we demonstrate the vulnerability of Platform FPGAs to two different hard-failures, namely, Electromigration, and time dependent dielectric breakdown (TDDB). We also analyze the performance degradation caused by Negative Bias Temperature Instability (NBTI) in the presence of thermal-variations. We validate the temperature variations estimated by the DTRM framework using a ring oscillator based real-time temperature measurement technique.